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This doubles the XCD count per AID compared to the MI300.
The patches suggest support for up to two MIDs, probably assigning one per AID.
This new component could be AMDs first integration ofVersal/Xilinx FPGAtechnology into its accelerator lineup.
AMD announced in 2022 that it planned to incorporate Xilinxs FPGA-powered AI inference engine into its CPU portfolio.
It could also be anAlveo series data center acceleration card.